Accelerating the execution of a program to solve the partition problem using an FPGA

Document Type

Project

Authors

Pratik Shrestha, Grand Valley State University

Lead Author Type

CIS Masters Student

Advisors

Dr. Christian Trefftz, trefftzc@gvsu.edu

Embargo Period

3-8-2021

Keywords

FPGA, Python, Partition Problem, Xilinx, PYNQ, HLS, Overlay

Abstract

Partition problem is one of the time-consuming tasks. As the total numbers to be partitioned increases, the execution time goes significantly high. In this project, the execution time required to solve the partition is reduced using an FPGA. The PYNQ board from Xilinx is used for the project. A customized overlay is created with HLS to accelerate the execution of the program. The experiment was carried out with four different methods with different size of number sets. The results obtained from the different methods are discussed and analyzed.

ScholarWorks Citation

Shrestha, Pratik, "Accelerating the execution of a program to solve the partition problem using an FPGA" (2020). Technical Library. 360.
https://scholarworks.gvsu.edu/cistechlib/360